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PCI Configuration Cycle
PCI Configuration Cycle
The core handles PCI configuration cycles without any backend involvement. The core does not allow configuration
space to be added to the backend logic.
During a configuration cycle, the DP_START and DP_DONE outputs will pulse when a configuration cycle occurs, and
the BAR_SELECT output will remain inactive. Figure 6-30 and Figure 6-31 on page 80 show the BAR_SELECT output
as inactive ('111').
cycle
0
1
2
3
4
5
6
clk
idsel
framen
cben[3:0]
ad[31:0]
par
devseln
irdyn
trdyn
stopn
dp_start
dp_done
bar_select[2:0]
rd_cyc
rd_stb_out
rd_stb_in
mem_add[15:0]
A
ADDR
0
Config Data
0010
mem_data_in[31:0]
Figure 6-30 · Configuration Read Cycle
v4.0
79
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